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sigmastar: msc313e SD slot -- SDIO0 (FCIE5) host, -drive if=sd - #214
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sstar-fcie (hw/sd/sstar-fcie.c) is the infinity3's SDIO0, the FCIE5 on its SDIO port that the vendor U-Boot and kernel drive the SD slot with (drivers/mstar/sdmmc of the I3 SDK MSC3XX_SDK_V_1711291828: hal_sdmmc_v5.c, hal_card_regs_v5.h, hal_card_platform_iNF3.c, ms_sdmmc_ub.c), banks 0x1410-0x1411 at 0x1F282000, INT_IRQ_SDIO (SPI 51): * a job runs on the SD_CTL write with JOB_START, as Hal_SDMMC_SendCmdAndWaitProcess drives it: the command from the CMD FIFO to the card on the SD bus and its response back into the FIFO (the index, or 0x3F for R2, then MSB first), CMD_END or CMD_NORSP; the data by DMA between the card and DDR (MIU addresses) or, with DEST_R2N, 64 bytes at a time through the CIFD buffer; DATA_END. A write's data is a second job after the command, as the HAL issues it; * MIE_EVENT, SD_STS and CIFD_EVENT clear on written ones; DAT0-3 read high; FCIE_RST's reset states follow the reset bit inverted (what sstar-riu answered for the bank, now in the model); * the card is -drive if=sd; the machine sets sstar-i3-gpio's sd-card, so PM_SD_CDZ reads "card in", else the drivers find no card at once. ADMA and the second host (FCIE, bank 0x1402, the NAND pads) are not modelled. Verified on msc313e with the retail camera's own U-Boot 2015.01 and its vendor SD driver (bootcmd removed with sstar-env.py), an MBR + FAT16 64 MiB card: mmc info (4-bit, 64 MiB, "QEMU!"), fatls, fatload of a 300000-byte file with the right CRC32, mmc write of 512 blocks and of 1 block that read back identical and land in the image file; without a card "Card Detect Fail!" at once. OpenIPC's U-Boot (openipc-sigmastar, ms_sdmmc) lists and reads the same card. The camera dump still boots to its shell with and without a card.
PR Summary by QodoAdd MSC313E SDIO0 host and SD card support
AI Description
Diagram
High-Level Assessment
Files changed (4)
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Code Review by Qodo
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![qodo-free-for-open-source-projects[bot]](https://avatars.githubusercontent.com/in/1068000?s=60&v=4){kind=small}
…IFD reads end; SD register tests Three fixes to the msc313e SDIO0 model, from Qodo's review of OpenIPC#214: * a DMA job moved its whole length (BLK_SIZE x JOB_BLK_CNT, up to 0xFFFF x 0xFFFF) through one g_malloc'd buffer; it now goes 4 KiB at a time and ends in RD_TOUT/WR_TOUT when the card stops sending or taking data before the job's length, as the host would time out; * a failed dma_memory_read/write was ignored: a card write got whatever the buffer held, a card read reported DATA_END; now the job stops there with the timeout bit and ERR_STS, and nothing reaches the card; * a DEST_R2N (CIFD) read that fit the first 64-byte buffer never raised DATA_END; it does once the card has sent the last byte. test-sigmastar.py gains test_msc313e_sd, register-level through qtest, with and without -drive if=sd: card detect, CMD8/ACMD41/CMD2 (R2) and responses, a two-block DMA read checked against the card image, a DMA write read back, a one-buffer CIFD read, a ~4 GiB job on a one-block read, and DMA to and from MIU 0x50000000 (nothing behind it) leaving the card's block unchanged. Against the previous model: the CIFD and both DMA-error checks fail, and the 4 GiB job hangs qemu; with this change the whole test-sigmastar.py passes (219 checks). OpenIPC's U-Boot (openipc-sigmastar, ms_sdmmc) still reads, writes and recovers from the card.
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sstar-fcie (hw/sd/sstar-fcie.c) is the infinity3's SDIO0, the FCIE5 on
its SDIO port that the vendor U-Boot and kernel drive the SD slot with
(drivers/mstar/sdmmc of the I3 SDK MSC3XX_SDK_V_1711291828:
hal_sdmmc_v5.c, hal_card_regs_v5.h, hal_card_platform_iNF3.c,
ms_sdmmc_ub.c), banks 0x1410-0x1411 at 0x1F282000, INT_IRQ_SDIO (SPI 51):
Hal_SDMMC_SendCmdAndWaitProcess drives it: the command from the CMD
FIFO to the card on the SD bus and its response back into the FIFO
(the index, or 0x3F for R2, then MSB first), CMD_END or CMD_NORSP;
the data by DMA between the card and DDR (MIU addresses) or, with
DEST_R2N, 64 bytes at a time through the CIFD buffer; DATA_END. A
write's data is a second job after the command, as the HAL issues it;
high; FCIE_RST's reset states follow the reset bit inverted (what
sstar-riu answered for the bank, now in the model);
so PM_SD_CDZ reads "card in", else the drivers find no card at once.
ADMA and the second host (FCIE, bank 0x1402, the NAND pads) are not
modelled.
Verified on msc313e with the retail camera's own U-Boot 2015.01 and its
vendor SD driver (bootcmd removed with sstar-env.py), an MBR + FAT16
64 MiB card: mmc info (4-bit, 64 MiB, "QEMU!"), fatls, fatload of a
300000-byte file with the right CRC32, mmc write of 512 blocks and of 1
block that read back identical and land in the image file; without a
card "Card Detect Fail!" at once. OpenIPC's U-Boot (openipc-sigmastar,
ms_sdmmc) lists and reads the same card. The camera dump still boots to
its shell with and without a card.
Used by OpenIPC/u-boot#86 (openipc-sigmastar), which tested with this model: SD recovery of the kernel and rootfs to flash, script.txt at boot, fatload, mmc write/read.