tests: Add DevX traffic over dmabuf UMEMs - #1789
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August 16, 2026 13:42
When a DevX UMEM is registered from a dmabuf FD, userspace still needs the backing memory's CPU address for WQE, CQE and doorbell access. Allow setting umem_addr after creation so the reported address matches the external buffer without re-registering the UMEM. Signed-off-by: Daniel Hayon <dhayon@nvidia.com> Signed-off-by: Shachar Kagan <skagan@nvidia.com>
A DMA-bounce CoCo device rejects a DevX RC QP on private memory, since the NIC cannot DMA into it. Source the QP, CQ, doorbells and data buffer from shared memory exported as dmabuf fds, run SEND_IMM traffic over it, and skip on non-CC / non-DMA-bounce devices. Signed-off-by: Daniel Hayon <dhayon@nvidia.com> Signed-off-by: Shachar Kagan <skagan@nvidia.com>
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Add an Mlx5UMEM.umem_addr setter so DevX UMEMs registered from a dmabuf FD can expose the CPU address of the backing buffer.
Also add a test that runs DevX RC SEND_IMM traffic on CoCo DMA-bounce devices using shared memory exported as dmabuf fds for the QP, CQ, doorbells, and data buffer, and skips elsewhere.