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x86: fix compressed displacements for scalar FP16 conversions #336

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136 changes: 136 additions & 0 deletions travis/avx512fp16-scalar-convert/avx512fp16-scalar-convert.asm
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; Scalar FP16 conversion disp8 scaling, including signed boundaries.
; SPDX-License-Identifier: BSD-2-Clause

bits 64

; vcvtsh2ss xmm0, xmm1, m16
vcvtsh2ss xmm0, xmm1, [rsi+2]
vcvtsh2ss xmm0, xmm1, [rsi+4]
vcvtsh2ss xmm0, xmm1, [rsi-2]
vcvtsh2ss xmm0, xmm1, [rsi-256]
vcvtsh2ss xmm0, xmm1, [rsi+254]
vcvtsh2ss xmm0, xmm1, [rsi+256]
vcvtsh2ss xmm0, xmm1, [rsi-258]
vcvtsh2ss xmm0, xmm1, [rsi+1]
vcvtsh2ss xmm0, xmm1, [r12+r13*2+4]
vcvtsh2ss xmm0, xmm1, xmm2

; vcvtsh2sd xmm0, xmm1, m16
vcvtsh2sd xmm0, xmm1, [rsi+2]
vcvtsh2sd xmm0, xmm1, [rsi+4]
vcvtsh2sd xmm0, xmm1, [rsi-2]
vcvtsh2sd xmm0, xmm1, [rsi-256]
vcvtsh2sd xmm0, xmm1, [rsi+254]
vcvtsh2sd xmm0, xmm1, [rsi+256]
vcvtsh2sd xmm0, xmm1, [rsi-258]
vcvtsh2sd xmm0, xmm1, [rsi+1]
vcvtsh2sd xmm0, xmm1, [r12+r13*2+4]
vcvtsh2sd xmm0, xmm1, xmm2

; vcvtsh2si eax, m16
vcvtsh2si eax, [rsi+2]
vcvtsh2si eax, [rsi+4]
vcvtsh2si eax, [rsi-2]
vcvtsh2si eax, [rsi-256]
vcvtsh2si eax, [rsi+254]
vcvtsh2si eax, [rsi+256]
vcvtsh2si eax, [rsi-258]
vcvtsh2si eax, [rsi+1]
vcvtsh2si eax, [r12+r13*2+4]
vcvtsh2si eax, xmm2

; vcvtsh2si rax, m16
vcvtsh2si rax, [rsi+2]
vcvtsh2si rax, [rsi+4]
vcvtsh2si rax, [rsi-2]
vcvtsh2si rax, [rsi-256]
vcvtsh2si rax, [rsi+254]
vcvtsh2si rax, [rsi+256]
vcvtsh2si rax, [rsi-258]
vcvtsh2si rax, [rsi+1]
vcvtsh2si rax, [r12+r13*2+4]
vcvtsh2si rax, xmm2

; vcvtsh2usi eax, m16
vcvtsh2usi eax, [rsi+2]
vcvtsh2usi eax, [rsi+4]
vcvtsh2usi eax, [rsi-2]
vcvtsh2usi eax, [rsi-256]
vcvtsh2usi eax, [rsi+254]
vcvtsh2usi eax, [rsi+256]
vcvtsh2usi eax, [rsi-258]
vcvtsh2usi eax, [rsi+1]
vcvtsh2usi eax, [r12+r13*2+4]
vcvtsh2usi eax, xmm2

; vcvtsh2usi rax, m16
vcvtsh2usi rax, [rsi+2]
vcvtsh2usi rax, [rsi+4]
vcvtsh2usi rax, [rsi-2]
vcvtsh2usi rax, [rsi-256]
vcvtsh2usi rax, [rsi+254]
vcvtsh2usi rax, [rsi+256]
vcvtsh2usi rax, [rsi-258]
vcvtsh2usi rax, [rsi+1]
vcvtsh2usi rax, [r12+r13*2+4]
vcvtsh2usi rax, xmm2

; vcvttsh2si eax, m16
vcvttsh2si eax, [rsi+2]
vcvttsh2si eax, [rsi+4]
vcvttsh2si eax, [rsi-2]
vcvttsh2si eax, [rsi-256]
vcvttsh2si eax, [rsi+254]
vcvttsh2si eax, [rsi+256]
vcvttsh2si eax, [rsi-258]
vcvttsh2si eax, [rsi+1]
vcvttsh2si eax, [r12+r13*2+4]
vcvttsh2si eax, xmm2

; vcvttsh2si rax, m16
vcvttsh2si rax, [rsi+2]
vcvttsh2si rax, [rsi+4]
vcvttsh2si rax, [rsi-2]
vcvttsh2si rax, [rsi-256]
vcvttsh2si rax, [rsi+254]
vcvttsh2si rax, [rsi+256]
vcvttsh2si rax, [rsi-258]
vcvttsh2si rax, [rsi+1]
vcvttsh2si rax, [r12+r13*2+4]
vcvttsh2si rax, xmm2

; vcvttsh2usi eax, m16
vcvttsh2usi eax, [rsi+2]
vcvttsh2usi eax, [rsi+4]
vcvttsh2usi eax, [rsi-2]
vcvttsh2usi eax, [rsi-256]
vcvttsh2usi eax, [rsi+254]
vcvttsh2usi eax, [rsi+256]
vcvttsh2usi eax, [rsi-258]
vcvttsh2usi eax, [rsi+1]
vcvttsh2usi eax, [r12+r13*2+4]
vcvttsh2usi eax, xmm2

; vcvttsh2usi rax, m16
vcvttsh2usi rax, [rsi+2]
vcvttsh2usi rax, [rsi+4]
vcvttsh2usi rax, [rsi-2]
vcvttsh2usi rax, [rsi-256]
vcvttsh2usi rax, [rsi+254]
vcvttsh2usi rax, [rsi+256]
vcvttsh2usi rax, [rsi-258]
vcvttsh2usi rax, [rsi+1]
vcvttsh2usi rax, [r12+r13*2+4]
vcvttsh2usi rax, xmm2

; Optional source, masking, and unchanged m32/m64/m16 controls.
vcvtsh2ss xmm0, [rsi+4]
vcvtsh2sd xmm0, [rsi+4]
vcvtsh2ss xmm0{k1}{z}, xmm1, [rsi+4]
vcvtsi2sh xmm0, xmm1, dword [rsi+4]
vcvtsi2sh xmm0, xmm1, qword [rsi+8]
vcvtusi2sh xmm0, xmm1, dword [rsi+4]
vcvtusi2sh xmm0, xmm1, qword [rsi+8]
vcvtss2sh xmm0, xmm1, [rsi+4]
vcvtsd2sh xmm0, xmm1, [rsi+8]
vaddsh xmm0, xmm1, [rsi+4]
Binary file added travis/avx512fp16-scalar-convert/avx512fp16-scalar-convert.bin.t
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14 changes: 14 additions & 0 deletions travis/avx512fp16-scalar-convert/avx512fp16-scalar-convert.json
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@@ -0,0 +1,14 @@
[
{
"description": "Check scalar FP16 conversion compressed displacements and preserve integer-source tuple widths",
"id": "avx512fp16-scalar-convert",
"format": "bin",
"source": "avx512fp16-scalar-convert.asm",
"target": [
{
"output": "avx512fp16-scalar-convert.bin",
"match": "avx512fp16-scalar-convert.bin.t"
}
]
}
]
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20 changes: 10 additions & 10 deletions x86/insns.dat
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Expand Up @@ -5495,12 +5495,12 @@ VCVTQQ2PH xmmreg|mask|z,xmmrm128|b64 [rm:fv: evex.128.np.map5.w1 5b /r] AVX512FP
VCVTQQ2PH xmmreg|mask|z,ymmrm256|b64 [rm:fv: evex.256.np.map5.w1 5b /r] AVX512FP16,AVX512VL
VCVTQQ2PH xmmreg|mask|z,zmmrm512|b64|er [rm:fv: evex.512.np.map5.w1 5b /r] AVX512FP16,AVX512VL
VCVTSD2SH xmmreg|mask|z,xmmreg*,xmmrm64|er [rvm:t1s: evex.nds.lig.f2.map5.w1 5a /r] AVX512FP16
VCVTSH2SD xmmreg,xmmreg*,xmmrm16|sae [rvm:t1s: evex.nds.lig.f3.map5.w0 5a /r] AVX512FP16
VCVTSH2SI reg32,xmmrm16|er [rm:t1s:evex.lig.f3.map5.w0 2d /r] AVX512FP16
VCVTSH2SI reg64,xmmrm16|er [rm:t1s:evex.lig.f3.map5.w1 2d /r] AVX512FP16
VCVTSH2SS xmmreg|mask|z,xmmreg*,xmmrm16|sae [rvm:t1s: evex.nds.lig.map6.w0 13 /r] AVX512FP16
VCVTSH2USI reg32,xmmrm16|er [rm:t1s:evex.lig.f3.map5.w0 79 /r] AVX512FP16
VCVTSH2USI reg64,xmmrm16|er [rm:t1s:evex.lig.f3.map5.w1 79 /r] AVX512FP16
VCVTSH2SD xmmreg,xmmreg*,xmmrm16|sae [rvm:t1s16: evex.nds.lig.f3.map5.w0 5a /r] AVX512FP16
VCVTSH2SI reg32,xmmrm16|er [rm:t1s16:evex.lig.f3.map5.w0 2d /r] AVX512FP16
VCVTSH2SI reg64,xmmrm16|er [rm:t1s16:evex.lig.f3.map5.w1 2d /r] AVX512FP16
VCVTSH2SS xmmreg|mask|z,xmmreg*,xmmrm16|sae [rvm:t1s16: evex.nds.lig.map6.w0 13 /r] AVX512FP16
VCVTSH2USI reg32,xmmrm16|er [rm:t1s16:evex.lig.f3.map5.w0 79 /r] AVX512FP16
VCVTSH2USI reg64,xmmrm16|er [rm:t1s16:evex.lig.f3.map5.w1 79 /r] AVX512FP16
VCVTSI2SH xmmreg,xmmreg*,rm32|er [rvm:t1s: evex.nds.lig.f3.map5.w0 2a /r] AVX512FP16
VCVTSI2SH xmmreg,xmmreg*,rm64|er [rvm:t1s: evex.nds.lig.f3.map5.w1 2a /r] AVX512FP16
VCVTSS2SH xmmreg,xmmreg*,xmmrm32|er [rvm:t1s: evex.nds.lig.np.map5 1d /r] AVX512FP16
Expand All @@ -5522,10 +5522,10 @@ VCVTTPH2UW zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.np.map5.w0 7c /r] AVX
VCVTTPH2W xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map5.w0 7c /r] AVX512FP16,AVX512VL
VCVTTPH2W ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map5.w0 7c /r] AVX512FP16,AVX512VL
VCVTTPH2W zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.66.map5.w0 7c /r] AVX512FP16
VCVTTSH2SI reg32,xmmrm16|sae [rm:t1s:evex.lig.f3.map5.w0 2c /r] AVX512FP16
VCVTTSH2SI reg64,xmmrm16|sae [rm:t1s:evex.lig.f3.map5.w1 2c /r] AVX512FP16
VCVTTSH2USI reg32,xmmrm16|sae [rm:t1s:evex.lig.f3.map5.w0 78 /r] AVX512FP16
VCVTTSH2USI reg64,xmmrm16|sae [rm:t1s:evex.lig.f3.map5.w1 78 /r] AVX512FP16
VCVTTSH2SI reg32,xmmrm16|sae [rm:t1s16:evex.lig.f3.map5.w0 2c /r] AVX512FP16
VCVTTSH2SI reg64,xmmrm16|sae [rm:t1s16:evex.lig.f3.map5.w1 2c /r] AVX512FP16
VCVTTSH2USI reg32,xmmrm16|sae [rm:t1s16:evex.lig.f3.map5.w0 78 /r] AVX512FP16
VCVTTSH2USI reg64,xmmrm16|sae [rm:t1s16:evex.lig.f3.map5.w1 78 /r] AVX512FP16
VCVTUDQ2PH xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.f2.map5.w0 7a /r] AVX512FP16,AVX512VL
VCVTUDQ2PH xmmreg|mask|z,ymmrm256|b32 [rm:fv: evex.256.f2.map5.w0 7a /r] AVX512FP16,AVX512VL
VCVTUDQ2PH ymmreg|mask|z,zmmrm512|b32 [rm:fv: evex.512.f2.map5.w0 7a /r] AVX512FP16
Expand Down